[Survey] Towards Efficient Large Language Model Serving: A Survey on System-Aware KV Cache Optimization
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Updated
Jan 9, 2026 - Python
[Survey] Towards Efficient Large Language Model Serving: A Survey on System-Aware KV Cache Optimization
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Using HDL, from Boolean algebra and elementary logic gates to building a Central Processing Unit, a memory system, and a hardware platform, leading up to a 16-bit general-purpose computer. Then, implementing the modern software hierarchy designed to enable the translation and execution of object-based, high-level languages on a bare-bone compute…
Explore a collection of resources and projects in Computer Science, covering algorithms, data structures, programming languages, and emerging technologies.
Simulator + benchmark suite for Micro Aerial Vehicle design.
SBTCVM is a virtual machine implementation of a balanced ternary (base 3) computer. Features several compiled languages for ternary software development.
Course files for ECS 154A in Winter Quarter 2020.
Accelerating Recommender model training by leveraging popular choices -- VLDB 2022
CS 211 Computer Architecture at Rutgers University
Ben Eaters SAP-1 Architecture Implemented by Me.
Computer architecture project : Cache simulator with LRU replacement policy
These are the Python implementations of FIFO, LRU and OPT page replacement algorithms
A simple script to plot the Roofline model for given HW platforms and applications
Virtualização de uma CPU 8-bits, no logisim, com instruções Assembly em formato inspirado no MIPS-Assembly.
A Python program for simulating different kinds of computer caches
MegIS is the first in-storage processing system designed to significantly reduce the data movement overhead of the end-to-end metagenomic analysis pipeline. Described in the ISCA 2024 paper by Mansouri Ghiasi et al.: https://arxiv.org/pdf/2406.19113
LC-3 VM Python implementation.
Area and delay optimization for parallel prefix adder circuits using reinforcement learning. UCF Fall 2025 EEL 6938 ST Computer Architecture Design for AI/ML
Tool for visualizing and comparing different dynamic branch prediction methods for a pipelined processor.
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